I have spoken with several individuals in the last few weeks who hold high expectations, and look to DesignCon as being the most valuable show of the year.  Although that is personal opinion, I can easily see why those sentiments have been shared.

If you’re in the area, be sure to register and attend the show.  You can buy your various passes here.

Also, be sure to follow @DesignCon2010 on twitter.

In addition to a large number of PCB enterprises in Taiwan, many PCB operations are located in Jiangsu, Zhejiang and Guangdong provinces.

Among them are leading PCB makers earning hundreds of millions of dollars in annual revenues and employing thousands of workers.

They also spend huge sums on environmental protection, including the disposal of manufacturing wastes from production processes and everyday operations.

The major pollution source of PCB industries is the copper content in the spent etchant and wastewater streams.

Traditionally, liquid resin is used to chelate spent etchant, forming copper ions and converting them into a copper sulfate solution for industrial applications.

Although this process can recover most of the copper from PCB waste streams, a considerable amount of the metal is unrecoverable. This metal is discharged into the environment, which can cause severe water pollution problems.

For any major plant, the daily amount of wastewater, along with untreated sludge, can total thousands of tons. This wastewater and sludge contains copper and also lead, tin and other metals used in soldering processes.

Stricter environmental protections adopted in recent years have forced PCB manufacturers to seek new technologies to promote better, yet cost-efficient waste recycling methods.Shortly after the State Council announced its 4 trillion yuan stimulus package to boost the domestic economy, attention turned to reviving industrial sectors battered by the ongoing global economic crisis.

During a series of meetings by the State Council in January and February this year, an “industrial restructuring” policy was adopted that focused on “10 key sectors.” The PCB industry is among those key sectors.

The government asked that PCB manufacturers focus on two elements: cleaner production (CP) and a circular economy (CE) to make this industry environmentally clear and economically stronger.

A semi-annual PCB technical conference in May at Suzhou, Jiangsu province, answered this CP/CE challenge with green technology sessions and economic discussions.

Hundreds of Chinese companies were represented – all eager to learn innovative technologies and international market trends.

Papers were presented on energy-saving measures, emissions reductions and also proposed CP/CE practices.

Seven universities in Taiwan established an incubator to study “best practice” CP/CE applications at the Center for Innovation and Incubation at Chung Yuan University.

The center has invited the participation of industry representatives, academic institutions and the government.

A persistent challenge is the incomplete recovery of copper from plant discharges, wastewater and sludge.

A recovery procedure recently developed by Taiwan-based Trinity Resource Technology Inc has employed a CP/CE solution.

The procedure involves separating copper compounds from wastewater in a way that recovers most of the copper, resulting in near-zero discharge.

Through a chemical treatment method operated outside the plant premises, the recovered copper compound is purified to form copper oxide, which can be recycled and used in the PCB electrolysis process.

Trinity is working with Chung Yuan University to build a pilot plant employing this new procedure.

This new approach is an example of the innovation that is being sought by the PCB industry to produce useful, profitable and environmentally sound products.

The author is a scientist and advisor to Trinity Resource Technology Inc of Taiwan
(For more biz stories, please visit Industries
(China Daily)

Altium Goes for the Masses
Breaking the EDA Mold… Again

by Kevin Morris, FPGA and Structured ASIC Journal

This week, Altium is introducing a new model for the purchase of electronic design tools, in an attempt to create a grass-roots revolution that will change the nature of the electronic design automation (EDA) market.  For the past several years, Altium has been marching to a different drummer – focusing on an integrated desktop design tool suite that spans the gamut of electronic design from system-level specification to board and package layout and verification to FPGA design and to embedded software development and debug.  We characterize this approach as the “Microsoft Office” of EDA – bundling together key capabilities that most design teams require and integrating them into one simple solution.

Now, Altium is doing the same thing with their pricing models, swerving very close to the “software as a service” concept by offering seats of their design suite for a very affordable monthly fee.  In addition, they’re reducing the prices on their perpetual licenses and on their development boards.  The result is that just about anyone who can afford to spend time doing electronic design can also afford a highly capable, comprehensive tool suite.  The price – comparable to what a professional graphic designer would pay for a high-end software suite from Adobe – is a mold-breaker for EDA and on a level playing field with what FPGA companies charge for their vendor-specific tool suites.  Altium is not competing with FPGA vendor tools, however.  Instead, they surround and complement them with a wide range of system- and board-level capabilities that extend far beyond FPGA pins.

Those familiar with the EDA industry may feel that Altium has gone too far, and that the price reductions will serve only to erode revenues in a market that is historically price-inelastic.  These experts are most likely wrong – because they’re familiar with the EDA industry.

The EDA industry began, about three decades ago, taking advantage of economy of scale in what was then the center of the electronic design market – ASIC design.  In those days, ASIC was the up-and-coming, well-funded middle.  The high-flying, cutting-edge, big-budget work was all full-custom IC design – practiced by big-company engineers who wore pocket protectors with their parachute pants (it was the early 80s, after all).  These companies often had their own semiconductor fabs and paid premium prices for Calma stations and other tools of the trade of the times.  The low-budget, lower-tech operations had to make do assembling their designs out of standard parts on custom boards.

ASIC, however, brought down the barrier to entry into custom chip design.  Now, smart design teams with modest resources could create custom chips that dramatically improved their competitiveness.  If you could add an ASIC to your design, reduced costs, improved integration, better performance, and smaller form-factors were all yours.  A plethora of ASIC companies emerged to capitalize on this new market, and the EDA industry soon emerged – producing ASIC design tools that enabled middle-of-the-road design teams to take advantage of the ASIC revolution.

Over time, however, ASIC design slowly moved from the middle of the market to the upper edge.  With each process generation, ASIC design became more complex and expensive, and the demands on design tools became more extreme.  EDA companies followed these customers into the stratosphere, producing more and more sophisticated ASIC design tools for their more and more demanding designers.  As this progressed, however, the field of design teams narrowed.  More expensive non-recurring engineering (NRE) and mask costs, more expensive and complex tools, and a more sophisticated design process whittled down the number of design teams that could do ASIC design competitively.

Today, only the most sophisticated, best-funded engineering teams attempt ASIC design.  Only the highest-volume, most-demanding design projects can justify the cost and risk of an ASIC design start. Technologies like FPGA and ASSP have moved in and taken over the vast majority (estimates are more than 95%) of electronic design starts from ASIC.

The EDA industry, however, has not followed along, for the most part.  EDA has thrived and/or survived over the years because their pricing could be relatively inelastic.  If a design tool could help you avoid a costly ASIC re-spin, a six-figure price tag was almost irrelevant.  Following on that fact, EDA became an industry of big-ticket software, big customers, and huge deals.  It grew an expensive, high-touch, direct sales channel whose primary activities were golfing, wining, and dining in order to maintain relationships with corporate-deal executives so their software catalog would be on top of the pile when it came time to negotiate and re-allocate the next two- or three-year multi-million dollar “remix” all-the-software-you-can-use contract.  With these sales channels established, EDA cruised along following the money.  Bigger investments went into more complex, more sophisticated tools.  The prices increased.  The size of the ASIC-designing customer base decreased.

Most of the electronic designers on Earth, however, couldn’t afford the big-ticket EDA tools even if they needed them.  Small- and mid-sized companies doing everything except ASIC design are generally forced into the cheap seats by the EDA industry.  Sure, you still pay nine dollars for a beer and seventeen-fifty for a souvenir photo program, but you’re watching the game from behind a post, high-up in left field (on the sun side), while the ASIC teams enjoy free cocktails and hors d’oeuvres in the air-conditioned box-suite.

Altium’s new pricing model aims to serve the vast majority of design teams who aren’t at the top of mainstream EDA’s party invite list.  This should have a particularly big impact in emerging engineering countries like India and China, and it could enable more robust competition from startups and mid-sized companies worldwide.  “Engineers are smart people,” says Altium CEO and founder Nick Martin.  “They will catch on to the fundamental changes occurring in electronic product design, and they will drive those changes within their organizations.”  Martin points out that today, product success is often predicated on an entire ecosystem consisting not only of hardware, but also software, services, and communication between those elements.  Driving that change requires coordination among engineers in a wide range of disciplines, and an integrated, affordable tool suite could be pivotal in realizing that vision.

by Kevin Morris, FPGA and Structured ASIC Journal

April 21, 2009